Recent years have seen increasing high performance in electronic devices such as mobile information devices and information appliances following the development of digital technology. With the increased high performance in these electronic devices, miniaturization and increase in speed of semiconductor memory devices used are rapidly advancing. Among these, application of semiconductor memory devices to large-capacity nonvolatile memories represented by a flash memory is rapidly expanding.
In addition, as a semiconductor memory device to be applied to a next-generation nonvolatile memory to replace the flash memory, research and development on a variable resistance nonvolatile memory device (what is called a variable resistance element) is advancing. Here, variable resistance element refers to an element which has a property in which a resistance value reversibly changes according to electrical signals, and is capable of storing information corresponding to the resistance value in a nonvolatile manner.
For example, Patent Literature (PTL) 1 proposes a variable resistance nonvolatile memory device configured of a variable resistance layer which is interposed between a pair of electrodes and includes, in a stacked structure, a first variable layer comprising a first metal oxide and a second variable layer comprising a second metal oxide having a lower degree of oxygen deficiency than the first metal oxide. Definition of the degree of oxygen deficiency shall be described later.
In PTL 1, it is possible to realize stable resistance changing operation because, according to the variable resistance nonvolatile memory device configured in the above manner, oxidation/reduction reaction of the variable resistance layer selectively occurs in an interface where the second variable resistance layer and an electrode are in contact.
Although capable of realizing stable resistance changing operation, the above-described variable resistance nonvolatile memory device requires processing (hereafter referred to as initial break processing) for forming a filament in the second variable resistance layer, in order to be brought, from the initial state immediately after manufacturing, to a state in which the resistance changing operation is possible.
The initial break processing is performed, for example, by applying, to the variable resistance layer, a voltage pulse having a voltage (hereafter referred to as initial break voltage) that is higher than the voltage required for normal variable resistance changing operation.
Consequently, a variable resistance nonvolatile memory device in which the initial break processing can be achieved with a lower initial break voltage is being studied.
For example, PTL 2 proposes a variable resistance nonvolatile memory device configured of a variable resistance layer which is interposed between a pair of electrodes and includes, in a stacked structure, a first variable layer comprising a first metal oxide and a second variable layer comprising a second metal oxide having a lower degree of oxygen deficiency than the first metal oxide, wherein the surface of the first variable resistance layer has a step, and the second variable resistance layer has a bend above the step.
In PTL 2, initial break processing is possible through the application of a low initial break voltage because, according to the variable resistance nonvolatile memory device configured in the above manner, a bend reflecting the shape of the step of the first variable resistance layer is formed in the second variable resistance layer above the step, and it becomes easy to form a filament centered on such bend.